This invention relates to integrated circuits and, more particularly, to performing floating-point operations using an integrated circuit.
Floating-point numbers are commonplace for representing real numbers in scientific notation in integrated circuits thanks to a desirable balance between numeric range and precision. Floating-point numbers are typically represented in binary format in accordance with the IEEE754 standard, which defines a floating-point number as consisting of a sign, a mantissa, and an exponent.
The arithmetic operations frequently performed on floating-point numbers are addition, subtraction, and multiplication. Operations such as division and square root are performed less frequently because division and square root are among the most complex arithmetic operations that generally use the most device resources. Therefore, efficient support for division and square root operations and similarly resource intensive floating-point operations such as the inverse square root and the inverse operation may be desirable.